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Full-Chip Physical Design Verification Engineer

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software

In inglese

Company

Tenstorrent

Location

Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States

Status

Open

Posted

2026-05-01T21:03:16+00:00

Tenstorrent is hiring a full-chip physical design verification engineer to drive SoC signoff and tapeout closure on advanced nodes. The work covers DRC, LVS, ERC, PERC, antenna and DFM verification in Calibre, ICV, Pegasus, FC and Innovus, plus ESD planning, padring, bump/RDL and IR-drop/EM reliability. Candidates need a BS/MS in electrical engineering, 7–14 years of CPU/IP/SoC physical verification experience, and Python and TCL scripting. Hybrid in Santa Clara, Austin or Fort Collins. Offers are contingent on eligibility to access U.S. export-controlled technology.