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FPGA Engineer
Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. This architecture allows Cerebras to deliver industry-leading training and inference speeds; over 10 times faster than GPU-based hyperscale cloud inference serv
In inglese
- Company
- Cerebras
- Location
- Sunnyvale, CA; Toronto, CAN
- Status
- Open
- Posted
- 2026-08-06T15:58:08.21+00:00
Cerebras builds a wafer-scale AI chip and the systems around it. This FPGA role sits on the Host and Network IO team, which owns the in-chassis IO path: cluster-facing RoCE v2/RDMA interfaces, a programmable switching fabric, and a proprietary serial link to the WSE. The work covers RTL improvements, next-generation FPGA design, production bitstreams deployed to customer inference clusters, timing closure, board bringup, and network performance debugging across hardware generations. The posting asks for 5+ years of production FPGA work (or a master's/PhD plus three), Verilog in Git repos, and familiarity with TCP, RoCE and network debug tools.
Original job posting