PlatformX: An End-to-End Transferable Platform for Energy-Efficient Neural Architecture Search

AI summary

Overview

• Research area: Hardware-aware neural architecture search (HW-NAS), energy-efficient deep neural networks, and edge/embedded machine learning.
• Technical level: Intermediate. The paper assumes familiarity with NAS concepts (search spaces, Pareto fronts, accuracy proxies) and mobile hardware basics, but explains each component in accessible terms.
• Scope: The paper presents PlatformX, a four-component automated pipeline that searches for deep neural network architectures balancing accuracy and on-device energy consumption, and evaluates it across three NAS benchmarks and three Android mobile devices.

What This Paper Is About

Designing neural networks for phones and embedded devices requires balancing accuracy against energy use, but existing hardware-aware NAS methods are slow (some costing thousands of GPU-days), need large amounts of manually collected power measurements, and do not transfer well across different hardware. PlatformX addresses this by combining an expanded energy-focused search space, a kernel-level energy predictor that adapts to new devices using only 50 to 100 measured kernel samples, a Pareto-based multi-objective search, and a fully automated power-profiling rig. The goal is to make energy-aware architecture search fast, accurate, and portable across heterogeneous edge platforms.

Key Contributions

1. Energy-efficiency-driven search space. PlatformX extends the NAS-Bench-201 cell-based space by relaxing channel, kernel-size, and stride constraints (output channels expanded to 1–10, 16, 32, 64, 128, 256; kernel sizes 1, 3, 5, 7; strides 1 and 2, versus the original 16/32/64 channels, kernels of 1 or 3, and stride 1). After shape-compatibility checks and TFLite compilation filtering, this yields 959,417 valid models, compared with the base space of 5^6 = 15,625.

2. Transferable kernel-level energy prediction. Rather than retraining a predictor per device, PlatformX trains a base multilayer perceptron on VAE-generated kernel micro-benchmarks, then adapts it to new hardware with few-shot calibration. The paper states this is the first transferable kernel-level energy prediction design for edge devices.

3. Pareto-based multi-objective search. The search treats estimated energy and a NASWOT accuracy proxy as simultaneous objectives, normalizes them (Min-Max for energy, log for the accuracy score), and uses a multi-objective gradient descent strategy with tunable per-objective weights to walk toward the Pareto front, only deploying a small batch of promising models per iteration.

4. Fully automated high-resolution runtime profiling. A Monsoon Power Monitor sampling at 5 kHz is triggered by inference start/stop events, so power capture is synchronized to model execution without human intervention, producing kernel-level millisecond-scale energy labels.

Main Findings

• Search cost: PlatformX completes the full search in 7 GPU-days, described as more than 400 times faster than NASNet-A (3,150 GPU-days) and nearly 10 times faster than TEA-DNN (9.7 days), while operating over a larger search space (9.6 × 10^5 versus 2 × 10^4 models). Table 1 also lists BRP-NAS at up to 60 days and MnasNet at 4.5 days.

• Profiling capability: PlatformX profiles 170 models at kernel-level (millisecond) granularity with full-loop automated search and on-device measurement. By contrast, Table 1 lists NASNet-A at 20,000 models profiled with no automation or on-device measurement, TEA-DNN at 400 models with model-level (second-scale) granularity, and BRP-NAS and MnasNet with no energy profiling at all.

• Reported model quality: The abstract states that PlatformX identifies models with up to 0.94 accuracy or as little as 0.16 mJ per inference, and that both outperform MobileNet-V2 in accuracy and efficiency.

• Search-space expansion improves trade-offs: Against the original NAS-Bench-201 architectures, the optimized models showed a 6.3% average increase in NASWOT score and a 72% average reduction in energy consumption. For NDS-DARTS the figures were +3.7% score and −24.8% energy; for NDS-ENAS, +4.5% score and −17.3% energy.

• Larger extended spaces: NDS-DARTS and NDS-ENAS were expanded from 5,000 models to 136,391 and 130,549 valid models, respectively.

• Energy concentration in specific operators: Profiling shows conv+bn+relu accounts for 93.97% of total energy on mobile CPUs and dwconv+bn+relu for 87.74% on mobile GPUs, and that kernel size dominates energy cost because of its quadratic relationship with compute complexity. Calibration effort is therefore weighted toward these operators and diverse kernel sizes.

• Evaluation speed-up from estimators: Combining the kernel-level energy predictor with a NASWOT zero-cost accuracy proxy reduces evaluation to roughly 85 milliseconds per model, versus over 1.2 hours per model for full training plus power measurement.

• Why exhaustive search is infeasible: Profiling every valid model on one device would take more than eight years of continuous testing, as reported in prior work cited by the authors.

• Cost trends motivating the work: The paper notes NASNet cost roughly 32,000 to 75,000 GPU-hours on CIFAR-10 (about 450 GPUs for three to seven days), AmoebaNet-A 75,600 GPU-hours (3,150 GPU-days), ENAS fewer than 16 GPU-hours on a single GTX 1080 Ti, MnasNet over 40,000 GPU-hours plus millions of device-side inference traces, and ProxylessNAS about 200 GPU-hours. TEA-DNN spends roughly 25 minutes of training and 10 minutes of power tracing per candidate, and BRP-NAS monopolized a 112-GPU cluster for 60 consecutive days.

• Reported inefficiency of accuracy-first search: The MnasNet controller drew a policy over 8,000 candidates but 98% were discarded once the on-device latency constraint was applied.

• Not reported in the provided content: The paper text supplied here is truncated after Section 5.2, so the quantitative results on predictor transfer accuracy across devices, calibration-sample sensitivity, and the traced Pareto search behavior are not reported in this summary's source material.

Methodology in Plain English

PlatformX runs as a closed loop across four pieces of hardware: a GPU server, an Android phone, a Monsoon power monitor, and a dedicated Wi-Fi router.

The server starts by generating candidate architectures from an expanded search space that includes energy-relevant knobs such as channel counts, kernel sizes, and stride. Because training and measuring every candidate is impossible, two cheap estimators screen the space first: a kernel-level energy predictor and NASWOT, a training-free proxy for accuracy. Models that look promising on the accuracy-energy trade-off are then sent to the phone.

On the phone, the model runs through the TensorFlow-Lite benchmark tool, and the power monitor — with the phone's battery removed so readings are not contaminated by USB charging — samples voltage and current at 5 kHz. Inference start and stop events on the phone trigger and terminate the monitor's capture, so the two timelines can be aligned: the system takes the first power sample after the recorded start timestamp and all samples up to the end timestamp, then computes average power as current times voltage and total energy as power times inference latency.

Real measurements feed back into the loop rather than being discarded. Architectures found on the current Pareto front are trained and measured, their measured energies validate or correct the predictor, and if prediction errors on particular kernels exceed a threshold those kernels are re-profiled individually and added to the predictor's training data. Because kernels are the unit of prediction, the predictor transfers better across models and devices than whole-network profiling would. When PlatformX lands on a new device, it profiles only 50 to 100 representative kernels, picks the base predictor with the smallest Kullback-Leibler divergence, and fine-tunes it on those samples.

For search, the system normalizes energy (Min-Max) and the accuracy proxy (log), then uses a multi-objective gradient descent rule: it computes each objective's gradient, solves for the weighted combination that minimizes the combined gradient norm, and picks new candidates whose gradients align most closely with that direction. Iterations continue until a model satisfies the constraints. A final selection step picks the model with the smallest weighted gradient norm, and the weights let users bias the result toward accuracy or toward energy.

Why This Matters

Impact on research. The paper frames the central obstacle to deployable energy-aware NAS as an evaluation-cost problem: search spaces have grown by roughly ten orders of magnitude (from NASNet-A's 2 × 10^4 candidates to TEA-DNN's 5.6 × 10^14) while per-model evaluation has stayed expensive. PlatformX's contribution is not a new architecture but a systems argument — that transferable kernel-level prediction, multi-objective Pareto search, and automated high-resolution profiling together cut wall-clock search cost enough to make real-device energy feedback practical. It also directly targets the well-documented weakness that FLOPs, latency, and hardware counters correlate poorly with true energy on devices with DVFS, shared memory bandwidth, and kernel fusion.

Real-world applications (as suggested by the paper's framing):

• Smartphone and mobile app inference, where models must fit a millisecond-scale inference budget and battery life is a primary user constraint.
• Automotive edge systems, given the involvement of Toyota InfoTech Labs and the paper's emphasis on heterogeneous, resource-constrained edge platforms.
• Embedded and microcontroller-class deployments, which the paper discusses via MCUNet and its per-board shunt-resistor instrumentation burden.
• Sustainable edge AI more broadly, which the paper lists as a keyword and ties to real-world sustainability constraints in model selection.

Industry relevance. The paper's motivation is explicitly operational: current profiling workflows require disassembling phones (about two hours per device, per the authors' experience, and voiding the hardware warranty), soldering sensors (one to two hours per board), or manually triggering runs. Those costs cap how much energy data any team can collect. An automated, transferable pipeline lowers that barrier for teams deploying models to fleets of devices, and the tunable accuracy-versus-energy weighting supports scenario-specific product decisions.

Future Directions

• Broadening the transferable predictor. The current design keys on convolutional patterns and structural parameters (tensor shape, input/output channels, kernel size, stride). Extending transfer to operator families and architectures not covered by the conv+bn+relu and dwconv+bn+relu patterns that dominate measured energy remains an open question.

• Scaling to larger search and task domains. Section 2.2 states the ambition to "scale to trillions of candidate networks," while the evaluated spaces top out at 959,417 valid models for NAS-Bench-201. Whether the same predictor and Pareto loop hold up at that scale is untested in the provided content.

• Generalizing across more hardware and runtime conditions. Experiments cover three Android devices evaluated on both CPU and GPU, with the predictor calibrated on Android Device-3 for the search-space study. The paper itself cites DVFS, cache hierarchy, power management policy, thermal throttling, cache contention, and kernel fusion as sources of device-specific behavior; how the few-shot calibration handles these conditions dynamically is a natural next question.

• Fuller reporting of the Pareto search trace. The evaluation plan lists tracing Algorithm 1 and Algorithm 2 behavior and measuring predictor transfer accuracy and calibration-data requirements. Those results fall outside the truncated text provided here, leaving the iteration-by-iteration behavior of the search as an open area for readers to verify in the full paper.

Target Audience

This paper is most useful to systems and ML researchers working on hardware-aware NAS and edge deployment, engineers at companies shipping models to fleets of heterogeneous devices (mobile, automotive, embedded), and practitioners who need real energy numbers rather than FLOPs or latency proxies. Readers with a background in neural architecture search, model compression, or mobile/embedded performance measurement will get the most from it; those new to NAS will find the bottleneck analysis in Section 2 a readable entry point. Code and tutorials are stated to be available at github.com/amai-gsu/PlatformX.

Authors’ abstract

Hardware-Aware Neural Architecture Search (HW-NAS) has emerged as a powerful tool for designing efficient deep neural networks (DNNs) tailored to edge devices. However, existing methods remain largely impractical for real-world deployment due to their high time cost, extensive manual profiling, and poor scalability across diverse hardware platforms with complex, device-specific energy behavior. In this paper, we present PlatformX, a fully automated and transferable HW-NAS framework designed to overcome these limitations. PlatformX integrates four key components: (i) an energy-driven search space that expands conventional NAS design by incorporating energy-critical configurations, enabling exploration of high-efficiency architectures; (ii) a transferable kernel-level energy predictor across devices and incrementally refined with minimal on-device samples; (iii) a Pareto-based multi-objective search algorithm that balances energy and accuracy to identify optimal trade-offs; and (iv) a high-resolution runtime energy profiling system that automates on-device power measurement using external monitors without human intervention. We evaluate PlatformX across multiple mobile platforms, showing that it significantly reduces search overhead while preserving accuracy and energy fidelity. It identifies models with up to 0.94 accuracy or as little as 0.16 mJ per inference, both outperforming MobileNet-V2 in accuracy and efficiency. Code and tutorials are available at github.com/amai-gsu/PlatformX.