Micius-Flash: Lightweight Agentic Intelligence for Engineering

AI summary

Overview

Research area: Software engineering and AI for science/engineering — specifically domain-specialized large language models and agents for semiconductor and hardware engineering (cs.SE).

Technical level: Advanced. The paper assumes familiarity with supervised fine-tuning, knowledge distillation, on-policy training, and hardware/EDA workflows.

Scope: A report on Micius-Flash, a 27-billion-parameter multimodal model with a 256K-token context window built for engineering tasks, covering its data pipeline, post-training recipe, benchmark results across 25 benchmarks, an engineering tool harness, and six case studies.

What This Paper Is About

General-purpose language models struggle with engineering work because the relevant knowledge is fragmented and underrepresented in web data, because engineering requires several different skills (domain reasoning, hardware coding, diagram understanding, tool use) that are hard to fit into one model without interference, and because real workflows need professional software that models cannot normally reach. The authors build a 27B model, Micius-Flash, that targets semiconductor engineering as its primary domain, train it with a knowledge-tree-driven data pipeline plus multi-teacher distillation, and connect it to real tools such as EDA software and KiCad through a workbench called Micius Harness. The goal is a single open-source model that can plan, call tools, debug, and verify multi-step engineering work.

Key Contributions

1. A knowledge-tree-driven data flywheel. A three-stage pipeline — knowledge tree construction and expansion, data synthesis, and quality validation with hard-example augmentation — that organizes semiconductor knowledge into a hierarchy plus cross-branch graph, indexes synthetic data to nodes, and routes evaluation failures back to specific knowledge nodes to drive the next data round.
2. Multi-Teacher On-Policy Distillation (MOPD). Four SFT-trained teachers (semiconductor knowledge and reasoning, coding, multimodal question answering, and agentic/tool-use tasks) are consolidated into one 27B student using token-level forward-KL supervision on trajectories the student itself generates, with each trajectory routed to the teacher for its task category.
3. Micius Harness. An engineering workbench with three subsystems — the Capability Broker (deterministic, scoped tool selection), the Engineering Viewer (traceable viewers for layouts, netlists, waveforms, PCB boards and schematics, with content-hash checks), and the Remote Execution Runtime (local and remote job execution with approval-gated uploads and recovery that leaves ambiguous outcomes unresolved rather than resubmitting).
4. A broad evaluation and open release. Three new benchmarks (SemiBench, Semiconductor Agent, PCB Agent), evaluation across 25 benchmarks, six end-to-end case studies, and an open-source release of Micius.

Main Findings

• Hardware coding average: Across 12 hardware coding benchmarks, Micius-Flash averages 64.2%, which the authors report as 15.0 points above a same-size baseline.
• Semiconductor agent benchmark: 62.41% on Semiconductor Agent (reported as 62.4% in the abstract), 17.2 points above the same-size baseline. This places it second among models with reported results, behind GPT-5.6 Sol (87.25%) and ahead of DeepSeek-V4-Pro (57.29%) and Qwen3.8-27B (45.22%).
• SemiBench: 49.70%, a 7.19-point gain over Qwen3.8-27B (42.51%), but well below GPT-5.6 Sol (88.02%), Claude Sonnet 5.0 (66.40%), and Gemini 3.0 Flash (68.50%).
• SuperGPQA gains over the base model: 72.22% on Circuits (+1.85), 86.36% on Electromagnetic Field (+2.27), 84.00% on Microelectronics (+8.00, the highest score among evaluated models on that subset), and 70.49% on Physics (+6.56).
• Vision: Highest among models with reported results on RFSchemBench (72.40%, versus Qwen3.8-27B at 66.80%) and CircuitSense (71.00%, versus Qwen3.8-27B at 69.80%); 80.60% on PCB-Bench, second behind GPT-5.6 Sol (86.96%).
• Selected coding results: 86.80% on VerilogEval-v2, 79.10% on RTLLM-v2 (tied with GPT-5.6 Sol for highest), 83.80% on NetlistBench (second, behind Kimi K2.6 at 90.56%), 65.80% on PyHDL-Eval, 48.30% on Rule2DRC (second, behind GPT-5.6 Sol at 75.50%), 76.20% on VHDLBench, and 79.20% on CreativEval.
• Uneven coding performance: Not every coding benchmark shows a lead — for example 53.50% on ArchXBench, below Claude Sonnet 5.0 (82.60%) and GPT-5.6 Sol (80.00%), and 16.10% on NotSoTiny. The authors state that relative performance varies across tasks.
• Other agentic benchmarks: 83.30% on PCB Agent and 50.50% on GameCraft-Bench, ranking second on all three agentic engineering benchmarks among models with reported results.
• General capabilities retained: 87.90% on HMMT and 84.20% on MMLU-Pro, both above the Qwen3.8-27B base (81.82% and 83.60%).
• Case study, chip design: For a streaming Sobel edge detector targeting Nangate45/FreePDK45, the model used post-route static timing analysis feedback to pipeline its datapath and closed timing at 100 MHz, then added transistor-level LVS checks to deliver a verified GDS layout.
• Case study, plugin development: A 376-line hole-pattern plugin for an open-source CAD system was completed in a single 33-minute session using 29 model calls and six check runs inside the host application.
• Case study, software replication: A PySide6 replica of a 3D modeling suite's workflow was built over ten build rounds in an 18-hour run using about 1,800 model calls.
• Case study, autonomous experiment: A battery characterization experiment across five load settings took 25.2 minutes and 33 tool requests, with an absolute electromotive-force error of 0.0032 V, a relative internal-resistance error of 10.71%, and all seven acceptance criteria satisfied.
• Case study, PCB engineering: A 5 V soft-latch design produced a two-layer board with nine footprints using an AO3401A P-channel MOSFET and an MMBT3904 circuit, alongside a 13-component 74HC74 LED latch and a seven-component LTC4054ES5-4.2 charger with a 10 kΩ resistor for a nominal 100 mA charging current.
• Case study, GPU kernel: For PnP pose refinement with Levenberg–Marquardt iterations, the model fused the pipeline into one kernel, cutting launches from 1,322 in the eager reference to one, passing all 12 validation tests with a geometric mean speedup of 174.8×.

Methodology in Plain English

The team started by building a structured map of semiconductor knowledge — a tree from broad domains down to individual concepts, plus cross-links between related ideas — using standards, normative documents, and core references, with agents extending and de-duplicating nodes. Every piece of training data is generated from a node or a small cluster of nodes along with its source evidence, so the map doubles as a coverage checklist. Synthetic reasoning questions are kept only when several strong models agree with the reference answer and the evidence; coding tasks are kept only if they compile and simulate; image-based questions are kept only if a text-only model cannot answer them without the picture. Quality is checked for diversity, difficulty balance, and answer correctness, and small trial fine-tuning runs reveal which knowledge nodes are still weak, feeding the next round.

For agentic data, the authors collected more than 500 expert-reviewed real semiconductor work scenarios, turned them into interactive workspaces with databases, files, and wrapped tool interfaces, and generated multi-step tasks defined as dependency graphs. The executing agent only sees the objective and some conditions, so it must gather information and coordinate tools itself. They tested the same pipeline on game development to check it generalizes beyond semiconductors.

Training happens in two stages. First, four separate specialist models are fine-tuned, one each for knowledge and reasoning, coding, multimodal understanding, and agentic tasks, and the base model is also given a supervised warmup. Second, the student generates its own responses and tool trajectories, each is routed to the matching specialist, and the student is trained to match that specialist's next-token distribution (retaining the teacher's top-32 token probabilities plus a single tail bucket). Because the student generates fresh trajectories as it improves, the specialists' behaviour is transferred in situations the student actually encounters. Finally, the Micius Harness wraps the model with scoped tool access, artifact viewers, and local or remote execution so it can operate real engineering software.

Why This Matters

The paper argues that domain specialization plus tool access, rather than scale alone, is what engineering agents need, and it offers a reproducible recipe: structured domain data, execution-verified samples, and distillation that merges complementary specialists without losing general capability. It also releases the model openly, which matters for a field where frontier proprietary systems dominate the top of the benchmark tables.

Real-world applications implied by the case studies:

• Chip design automation: going from a hardware specification to synthesizable RTL, differential verification against a golden model, and a timing-closed, LVS-checked layout using EDA feedback.
• PCB engineering and repair: generating native KiCad schematics and boards checked with ERC, DRC, netlists, and copper-connectivity verification, and making local fixes to existing designs.
• Industrial software extension: building CAD, 3D modeling, and EDA plugins against the real host application, and reconstructing desktop applications from observed behavior.
• Autonomous and accelerated engineering science: operating lab instruments to estimate physical parameters, and rewriting numerical routines into fused GPU kernels with validated speedups.

Industry relevance centers on the harness: scoped tool access, traceable artifact inspection, and approval-gated remote execution are the kinds of controls engineering organizations require before letting a model touch design files or simulation infrastructure.

Future Directions

• Closing the gap to frontier proprietary models on domain knowledge. SemiBench (49.70% versus GPT-5.6 Sol's 88.02%) and Semiconductor Agent (62.41% versus 87.25%) show large headroom, and the paper's own flywheel is designed to attack weak knowledge nodes identified by evaluation.
• Extending the data pipeline beyond semiconductors. The authors report an initial test on game development; broader domains and their scenario taxonomies are the natural next step.
• Broadening tool and environment coverage in Micius Harness, including more EDA and CAD backends and more reliable handling of ambiguous or failed remote executions.
• Addressing uneven benchmark performance. Results vary widely across coding tasks (for example ArchXBench at 53.50% and NotSoTiny at 16.10%), and the paper does not report an analysis of why some hardware coding benchmarks lag.

Target Audience

Researchers and engineers working on domain-specialized LLMs, agentic systems, and post-training methods such as multi-teacher distillation will get the most from this paper, as will practitioners in semiconductor, EDA, and PCB workflows who want to understand what an open 27B model with tool access can currently do. It is also useful for teams designing agent infrastructure, since the Micius Harness describes concrete patterns for scoped tool permissions, artifact provenance, and safe remote execution. Readers seeking a purely algorithmic or theoretical contribution will find it is primarily a system and empirical report.

Authors’ abstract

We introduce Micius-Flash, a 27-billion-parameter model for engineering with native multimodal input, deep reasoning and a 256K-token context window. We design the Micius data pipeline as a knowledge-tree-driven data flywheel comprising three stages: knowledge tree construction and expansion, data synthesis, and quality validation with hard-example augmentation. From this data, we train expert models for semiconductor knowledge and reasoning, hardware coding, and…