Research
MaskOpt: A Large-Scale Mask Optimization Dataset to Advance AI in Integrated Circuit Manufacturing
Overview Research area: Machine learning for semiconductor manufacturing, specifically mask optimization (optical proximity correction and inverse lithography) for integrated circuit fabrication. Tech

- arXiv
- 2512.20655
- Published
- 2025-12-18
- Authors
- Yuting Hu, Lei Zhuang, Hua Xiang, Jinjun Xiong, Gi-Joon Nam
AI summary
Overview
- Research area: Machine learning for semiconductor manufacturing, specifically mask optimization (optical proximity correction and inverse lithography) for integrated circuit fabrication.
- Technical level: Intermediate — readers need basic familiarity with lithography concepts (OPC, ILT, optical proximity effects) and standard deep learning evaluation workflows.
- Scope: The paper introduces MaskOpt, a large-scale dataset of 104,714 metal-layer and 121,952 via-layer layout tiles extracted from real 45 nm IC designs, along with benchmark evaluations of four deep learning mask-optimization models and studies on context size and cell-tag inputs.
What This Paper Is About
As IC features shrink below the lithographic wavelength, transferring a design onto a wafer requires computationally expensive correction of the mask — either model-based optical proximity correction (OPC) or inverse lithography technique (ILT). Deep learning could speed this up, but existing datasets (notably LithoBench) rely on synthetic metal-layer layouts, ignore the standard-cell hierarchy of real designs, and omit the neighboring geometry that causes optical proximity effects. MaskOpt addresses this by clipping layout tiles at real standard-cell placements in real designs, pairing each tile with model-based OPC and ILT masks, and supplying variable context windows plus a standard-cell tag.
Key Contributions
- A new large-scale dataset built from real silicon data. MaskOpt contains 104,714 metal-layer tiles and 121,952 via-layer tiles drawn from five real IC designs at the 45 nm node, explicitly preserving standard-cell placement context rather than using synthetic layouts or full-chip striding.
- Cell-aware, context-aware sample design. Each tile is clipped by sweeping a 512 nm × 512 nm core region inside a standard-cell instance's bounding box, then extending it with context margins of 0 nm, 16 nm, 32 nm, 64 nm, and 128 nm; each sample carries a standard-cell tag alongside its target image and two ground-truth masks (model-based OPC and ILT).
- Benchmarks for four state-of-the-art DL models. GAN-OPC, Neural-ILT, DAMO, and CFNO are evaluated for ILT mask prediction, while GAN-OPC and DAMO are additionally evaluated for model-based OPC, using L2 error, edge placement error (EPE), process variation band (PVB), and mask fracturing shot count.
- Empirical studies on context and cell inputs. A context-size sweep and an input ablation (removing the cell tag from GAN-OPC) quantify how much surrounding geometry and hierarchy information matter for mask fidelity.
Main Findings
- Surrounding context helps, but the optimal window differs by layer. Across all baselines, adding surrounding shapes improved mask generation over the 0 nm context setting for both metal and via layers. Metal-layer models achieved their best accuracy with a small context of 32 nm, while via-layer models consistently peaked at 128 nm — attributed to the sparsity of via patterns in standard cells.
- Sample-level error figures track the context trend. For an AND2_X1 gate, the lowest L2 error occurred at 32 nm context, reaching 30831 for the OPC task and 21273 for the ILT task.
- Clear accuracy-versus-manufacturability trade-offs among baselines. On metal layers, DAMO produced the lowest L2 (56076) and EPE (44.4) for model-based OPC and the lowest L2 (56900) and EPE (40.9) for ILT, but at the highest shot counts (297 and 740 respectively). OPC-GAN produced the lowest shot counts on both layers (153 metal / 72 via for OPC; 634 metal / 228 via for ILT) at the cost of higher L2 and EPE.
- Neural-ILT was a middle ground. It delivered moderate values across all metrics — for example, metal-layer ILT L2 of 59080 with EPE 43.3 and 665 shots — without dominating any single metric.
- Removing the cell tag hurts via layers most consistently. In the input ablation, dropping the cell tag degraded every reported metric on via layers for both model-based OPC and ILT, and degraded most metrics for ILT on metal layers; the paper reports the largest single deltas as ΔL2 of 1810 (model-based OPC, metal) and ΔPVB of 200 (ILT, via).
- Ground-truth masks come from academic tools. Model-based OPC and ILT masks were generated through the OpenILT platform, with ILT minimizing a combination of L2 and process variation band losses, simulated on an enlarged 2048 nm × 2048 nm window before cropping at the core region.
Methodology in Plain English
The team took five real circuit designs built with the OpenROAD flow using the Nangate 45 nm open cell library, spanning encryption circuits, arithmetic units, and processor cores. For every instance of a standard cell, they slid a fixed core window across the cell's bounding box and cropped the layout at that window, optionally extending the crop by a margin of 0, 16, 32, 64, or 128 nm so the sample includes neighboring shapes. They did this separately for metal and via layers, converted everything to 1024 × 1024 images at 1 pixel per nm², and used KLayout to clip and save tiles as GDS files for OpenILT simulation. Ground-truth masks came from running model-based OPC and ILT in OpenILT over a larger 2048 nm × 2048 nm target window, then cropping to the core. For benchmarking, they modified each baseline generator to accept the standard-cell tag as an extra input — encoded as a one-hot map expanded to 1024 × 1024 and concatenated along the channel dimension rather than learned as an embedding. All models were implemented in PyTorch and trained on 2 × NVIDIA A100 GPUs. Predictions were evaluated by simulating the wafer image of the predicted mask and comparing it to the target using L2 error (with a core mask zeroing out non-core regions), EPE violations, PVB under ±2% dose error, and rectangular shot count.
Why This Matters
Impact on research. Prior benchmarks leaned on synthetic metal layouts and full-chip striding, which limited how well trained models transferred to real designs. MaskOpt supplies real-design, cell-hierarchical, context-annotated data for both metal and via layers at 45 nm, giving the ML-for-EDA community a shared testbed for cell-based hierarchical OPC research — a technique already widely used in industry but underrepresented in public datasets.
Real-world applications.
- Training faster mask-optimization surrogates that reduce the number of lithography simulations in an OPC flow.
- Cell-level OPC reuse, where one optimized mask for a standard cell is applied across many placements in a chip or across chips.
- Model selection guided by manufacturability, since the benchmark exposes the L2/EPE versus shot-count trade-off that determines mask writing cost.
- Via-layer correction, where the paper shows larger context windows and cell tags matter most.
Industry relevance. The dataset is built at the 45 nm node with real designs and masks produced by widely used academic methods, so it maps directly onto how fabs and EDA vendors reason about resolution enhancement. The inclusion of mask fracturing shot count ties model quality to a concrete manufacturing cost, since each shot corresponds to a rectangular write operation. The paper situates this against LithoBench's 16,472 synthesized metal tiles at 32 nm and 116,415 via tiles at 45 nm, ICCAD-13's 10 metal-layer tiles at 32 nm, and GAN-OPC's roughly 4k synthetic tiles.
Future Directions
- Extending MaskOpt to smaller technology nodes, since the current dataset is limited to 45 nm while advanced production uses substantially finer dimensions.
- Investigating whether the per-layer optimal context (32 nm for metal, 128 nm for via) generalizes to other designs, cell libraries, or nodes, and whether adaptive context selection can be learned rather than fixed.
- Incorporating the optics explicitly, since the paper notes that physics-informed designs and data scarcity motivate hybrid approaches such as CNFO and BSCNN-ILT.
- Improving the manufacturability of high-accuracy models, given that DAMO's best L2 and EPE came with the highest shot counts — suggesting post-processing or complexity-aware training as an open problem.
- Exploring whether a learned embedding for cell tags outperforms the one-hot concatenation used here, and whether richer hierarchy beyond a single cell tag (for example, neighboring cell identity) further improves predictions.
Target Audience
Researchers and graduate students working on machine learning for EDA and computational lithography; EDA and semiconductor process engineers interested in dataset design for OPC and ILT; and practitioners building deep learning surrogates for mask optimization who need benchmarks with realistic cell hierarchy, neighboring context, and manufacturability metrics.
Authors’ abstract
As integrated circuit (IC) dimensions shrink below the lithographic wavelength, optical lithography faces growing challenges from diffraction and process variability. Model-based optical proximity correction (OPC) and inverse lithography technique (ILT) remain indispensable but computationally expensive, requiring repeated simulations that limit scalability. Although deep learning has been applied to mask optimization, existing datasets often rely on synthetic layouts, disregard standard-cell hierarchy, and neglect the surrounding contexts around the mask optimization targets, thereby constraining their applicability to practical mask optimization. To advance deep learning for cell- and context-aware mask optimization, we present MaskOpt, a large-scale benchmark dataset constructed from real IC designs at the 45$\mathrm{nm}$ node. MaskOpt includes 104,714 metal-layer tiles and 121,952 via-layer tiles. Each tile is clipped at a standard-cell placement to preserve cell information, exploiting repeated logic gate occurrences. Different context window sizes are supported in MaskOpt to capture the influence of neighboring shapes from optical proximity effects. We evaluate state-of-the-art deep learning models for IC mask optimization to build up benchmarks, and the evaluation results expose distinct trade-offs across baseline models. Further context size analysis and input ablation studies confirm the importance of both surrounding geometries and cell-aware inputs in achieving accurate mask generation.