DeepRWCap: Neural-Guided Random-Walk Capacitance Solver for IC Design

AI summary

Overview

Research area: Machine learning for electronic design automation (EDA), specifically parasitic capacitance extraction via neural-guided Monte Carlo random walk methods.

Technical level: Advanced. The paper assumes familiarity with floating random walk theory, Poisson kernels, Laplace's equation boundary value problems, convolutional neural network design, and GPU inference engineering.

Scope: The paper introduces a two-stage convolutional neural architecture that predicts the transition kernels required by floating random walk capacitance extraction in multi-dielectric domains, and pairs it with a GPU-accelerated inference engine, evaluated on 10 industrial designs spanning 12 to 55 nm technology nodes.

What This Paper Is About

Floating random walk (FRW) methods are attractive for extracting parasitic capacitance from integrated circuit layouts because they need no mesh and parallelize naturally, but each walk step requires a transition kernel — a solution to Laplace's equation inside a cube of heterogeneous dielectric material — that is expensive to compute exactly. Existing approximations either introduce bias (OCT, AGF with cube shrinking or volume-weighted averaging) or lack support for the first step of each walk (Microwalk falls back to AGF and cube shrinking for gradient sampling). DeepRWCap's goal is to learn those transition quantities with compact neural networks so that walk steps in non-stratified dielectric regions become fast and unbiased.

Key Contributions

1. A unified neural architecture that predicts both Poisson kernels and gradient kernels across multi-dielectric domains, decomposing the structured output into a face-wise categorical distribution (predicted by a 3D convolutional "face selector") and a per-face spatial kernel (predicted by 2D depthwise separable convolutions), exploiting cube symmetries to reduce learning redundancy.

2. A GPU-accelerated inference engine with a lock-free producer-consumer scheduling architecture, multi-instance model deployment (one Poisson solver per two walker threads, one shared gradient solver), TensorRT FP16 compilation, and custom fused CUDA kernels that voxelize data directly on the GPU.

3. An extensive industrial evaluation on 10 test cases across 12, 16, 28, and 55 nm nodes, reporting a mean relative error of 1.24% ± 0.53% against the commercial Raphael solver, an average 23% speedup over Microwalk, and an average 49% acceleration on complex designs with runtimes over 10 s.

Main Findings

• Accuracy against a commercial reference: DeepRWCap achieves a mean relative error of 1.24% ± 0.53% on self-capacitance estimation across 10 industrial designs spanning 12 to 55 nm nodes, benchmarked against the commercial Raphael solver. Individual case errors range from 0.6% ± 0.5% (case 8) to 2.2% ± 0.2% (case 5).

• Speedup over the state of the art: Compared to the stochastic difference method Microwalk, DeepRWCap achieves an average 23% speedup (reported as 1.23× in a Wilcoxon signed-rank test at α = 0.05, with p = 0.024) while maintaining statistically equivalent accuracy. On complex designs with runtimes over 10 s, the abstract reports an average 49% acceleration.

• Reliability advantage over AGF: Although FRW-AGF executed faster, it showed high variance in error rates at 5.18% ± 7.81%, versus DeepRWCap's 1.24% ± 0.53%.

• Neural inference is needed only on a fraction of steps: The average percentage of transition cubes classified as non-stratified (requiring neural network inference) ranged from 11.2% to 55.8% for Poisson kernel sampling and 0.0% to 13.4% for gradient kernel sampling.

• GE-CNN degrades on advanced nodes: The adapted GE-CNN baseline produced errors larger than 5% on several cases, including 22.9% ± 0.7% (case 9, 12 nm) and 27.1% ± 0.8% (case 10, 12 nm).

• Architecture ablation validates the design decomposition: For single-face Poisson kernel prediction, depthwise separable convolutions with grid positional encoding reached 3.93% L2 error and KL divergence 0.0021 with 1.40 K parameters and 0.84 M FLOPs. By comparison, an MLP used 34.4 M parameters and 34.4 M FLOPs for 7.83% L2 error; 3D convolution used 19.7 K parameters and 20.3 M FLOPs for 24.15% L2 error; 2D convolution reached 13.80% with 4.28 K parameters; and GE-CNN + GMM reached 26.63% with 0.43 M parameters and 0.65 M FLOPs.

• Positional encoding matters: DS Conv alone gave 12.15% L2 error and 0.0083 KL divergence; adding learned positional encoding improved this to 4.11% and 0.0023; fixed grid encoding gave the best result at 3.93% and 0.0021.

• Normal-oriented gradient faces are harder to learn: A small-model comparison showed validation MSE of 4.20 × 10⁻⁸ for the Poisson task and 4.67 × 10⁻⁸ for the tangential gradient kernel, but 1.94 × 10⁻⁷ for the normal-oriented gradient kernel — roughly an order of magnitude higher, with relative L2 losses of 5.64, 5.34, and 11.83 respectively. This motivated the wider normal gradient solver with channels (64, 64, 32, 32, 16, 16, 8, 4).

• Component model sizes: The Poisson solver and gradient tangent solver each use 1.40 K parameters and 0.84 M FLOPs, with validation losses of 2.1 × 10⁻³ (KL) and 3.2 × 10⁻⁸ (MSE). The gradient normal solver uses 5.96 K parameters and 3.48 M FLOPs with 4.5 × 10⁻⁸ MSE. The Poisson selector uses 13.16 K parameters and 0.31 M FLOPs with 7.6 × 10⁻⁴ validation loss; the gradient selector uses 196.7 K parameters and 1.16 M FLOPs with 2.8 × 10⁻³ combined KL+MSE loss.

Methodology in Plain English

The authors treat each random walk step's transition cube as a small 3D picture of dielectric materials. They cut this cube into a 23 × 23 × 23 voxel grid and normalize the permittivity values by dividing by the maximum, so inputs always lie in (0, 1]. The targets — the Poisson kernel, weight value, sign distribution, and gradient kernel — are discretized across the six cube faces as 6 × N × N tensors.

Because predicting all six faces at once wastes capacity (the kernel is equivariant under the cube's symmetry group), they split the problem in two. First, a face selector — a 3D convolutional network with stride 2 and four convolutional layers — predicts a six-way categorical distribution over which face the walk should exit through. Second, a face predictor — a 2D depthwise separable convolutional network — predicts the detailed spatial shape of the kernel on that chosen face, with grid-based positional encoding of the (x, y) coordinates appended as two extra input channels.

For the first step of each walk, the solver additionally needs the weight, the sign distribution, and the gradient kernel. The authors fold the weight regression into the gradient face selector by expanding its output from 6 to 7 dimensions and adding a mean squared error term to the KL divergence loss. They learn the signed gradient kernel directly rather than learning sign and magnitude separately, and because the gradient kernel is only equivariant to a subgroup of cube symmetries, they train separate predictors for tangential and normal faces. Only the z-component is learned; the x and y components are derived by applying rotations and reflections to the dielectric input.

Training data is generated procedurally rather than collected from real layouts. Algorithm 1 places random dielectric blocks (centers sampled from U(−2, 2), side lengths from U(0, 4), permittivity from a mixture that is U(2, 10) with 80% probability and U(10, 80) with 20% probability), optionally nests blocks to mimic conformal coatings, and finishes with an infinite background block. Two datasets of 100,000 samples each were generated with B = 5 blocks and nesting probability p_nest = 0.2, using a finite-difference-method solver to compute ground-truth targets — a process that took 1.7 hours.

Models were trained with batch size 16 for 200 epochs using AdamW (β₁ = 0.9, β₂ = 0.999, no weight decay), gradient clipping at norm 1.0, and cosine annealing from 1 × 10⁻³ to 5 × 10⁻⁶ with a 20-epoch warmup. Each training run required 12.3 hours, and λ = 1 was used for the dual-objective loss.

For inference, the implementation targets throughput: walkers submit transition tasks to a lock-free queue processed in batches on the GPU, multiple model instances run simultaneously so that CPU-GPU transfers overlap with computation, and only compact structural descriptions (not voxelized data) are transferred before GPU-side voxelization. Inference uses TensorRT FP16 compilation and custom fused CUDA kernels. Experiments ran on an Intel Xeon Silver 4214 CPU @ 2.20GHz with an NVIDIA RTX 4090 GPU.

Why This Matters

Impact on research: The work demonstrates that a hybrid approach — learning only the numerically expensive kernel evaluations inside an otherwise classical stochastic solver — can deliver both unbiasedness and practical speedup, whereas earlier fully learning-based capacitance predictors (CNN-Cap, GNN-Cap, PCT-Cap) require retraining per process node and earlier hybrid approaches (GE-CNN) were 12× slower than vanilla FRW. The paper also shows that architectural inductive biases derived from cube symmetry and dielectric locality are what make the compact models viable, offering a template for applying similar decomposition to other elliptic PDEs.

Real-world applications:

• Parasitic capacitance extraction during physical verification of integrated circuit layouts, where the paper notes accuracy is typically required within 5% error.
• Timing, power consumption, and signal integrity analysis in the pre-fabrication design flow.
• Characterization of advanced 3D transistor architectures — FinFETs, Gate-All-Around, and Complementary Field-Effect Transistors — and of conformal, high-contrast dielectric stacks.
• Vertically stacked 3D ICs and interconnects, where thinner footprints and shorter interconnect lengths shift the capacitance budget.

Industry relevance: Ground truth for the evaluation came from the commercial Raphael solver, which takes hours per case, while DeepRWCap runs in the same footprint as the state-of-the-art Microwalk solver with an average 23% speedup and 49% acceleration on the most expensive designs. Since the model learns dielectric configurations explicitly rather than implicitly, it generalizes across the 12, 16, 28, and 55 nm nodes tested without per-node retraining, which is the practical bottleneck for deployed extraction tools.

Future Directions

• Extending beyond capacitance to other elliptic PDEs. The conclusion states the framework "serves as a basis for future extensions to other elliptic PDEs," but no concrete extensions are demonstrated in this paper.
• Handling domains where neural inference is always required. The zero-percent non-stratified Poisson fraction in cases 5 and 6 and the near-zero gradient fractions show that many transitions still resolve analytically; improving the fraction of cases where learning is needed (or reducing model cost where it is not) is an open engineering question.
• Improving the normal-face gradient kernel. The paper itself documents that normal-oriented faces have roughly an order-of-magnitude higher validation loss than tangential faces and required a wider network. Whether a better representation can close that gap is not resolved.
• Scaling to denser technology nodes. The evaluation covers 12 to 55 nm; the paper does not report results below 12 nm or for gate-all-around and complementary FET structures mentioned in the introduction, so generalization to those regimes is untested.

Target Audience

This paper is best suited to researchers and practitioners in electronic design automation working on parasitic extraction and physical verification, to machine learning researchers interested in hybrid neural-numerical PDE solvers, and to GPU systems engineers focused on high-throughput batched inference. Readers need familiarity with floating random walk theory, Laplace's equation, and convolutional network design; beginners in any of these areas will find the derivations in the preliminaries section demanding.

Authors’ abstract

Monte Carlo random walk methods are widely used in capacitance extraction for their mesh free formulation and inherent parallelism. However, modern semiconductor technologies with densely packed structures present significant challenges in unbiasedly sampling transition domains in walk steps with multiple high contrast dielectric materials. We present DeepRWCap, a machine learning guided random walk solver that predicts the transition quantities required to guide each step of the walk. These include Poisson kernels, gradient kernels, and the signs and magnitudes of weights. DeepRWCap employs a two stage neural architecture that decomposes structured outputs into face wise distributions and spatial kernels on cube faces. It uses 3D convolutional networks to capture volumetric dielectric interactions and 2D depthwise separable convolutions to model localized kernel behavior. The design incorporates grid based positional encodings and structural design choices informed by cube symmetries to reduce learning redundancy and improve generalization. Trained on 100000 procedurally generated dielectric configurations, DeepRWCap achieves a mean relative error of 1.24 +/- 0.53% when benchmarked against the commercial Raphael solver on the self capacitance estimation of 10 industrial designs spanning 12 to 55 nm nodes. Compared to the state of the art stochastic difference method Microwalk, DeepRWCap achieves an average speedup of 23%. On complex designs with runtimes over 10 seconds, it reaches an average acceleration of 49%.