The Pulse
Synaptics Introduces SR200 xMCUs With Up to 400 GOPS
Synaptics announced its Astra SR200 series, a family of microcontrollers designed to run multimodal AI workloads on edge devices. The SR210, SR230 and SR250 combine Arm cores, a Torq AI engine and in-package memory, with the top model rated
AI.info Team · Written with AI · fact-checked ·
Synaptics introduced the Astra SR200 series on October 20, pitching it as a new category of microcontroller that can handle vision, audio and display workloads alongside AI inference. The three products—SR210, SR230 and SR250—offer stated AI performance of 200, 300 and 400 GOPS, respectively. Synaptics says the chips target devices such as wearables, smart cameras, battery-powered sensors and industrial systems.
The announcement’s central claim is that an MCU can take on workloads that have typically called for a more powerful application processor, while keeping processing on the device. Synaptics calls the category “xMCU.” The company’s figures and capabilities are manufacturer claims; its release does not provide independent benchmark results or pricing.
Three SR200 models share one board design
The SR210 is aimed at always-on voice and sensing, while the SR230 adds vision and display capabilities. Synaptics positions the SR250 at the top of the range, with dual vision and display paths for more demanding applications. All three are pin-compatible, allowing device makers to use the same board layout across models, according to the company.
The lineup pairs Arm Cortex-M85 and Cortex-M52 cores, with the M85 reaching 800 MHz in the SR250. Synaptics says the efficiency core can handle tasks such as sensor fusion and connectivity, while the higher-performance core takes on control, multimedia and bursts of computation. An optional Cadence Tensilica HiFi 5 DSP provides dedicated audio processing in some configurations.
In-package DRAM is the memory bet
To support larger models and multimedia data, the SR200 combines up to 8MB of SRAM with custom DRAM integrated into its system-in-package design. Synaptics says the DRAM can scale to hundreds of megabytes and that the architecture runs workloads at one-third the power of “typical system DRAM.” The release does not specify the exact DRAM capacity for each SR200 model.
The company also says the design can avoid external memory in most applications. Keeping memory within the package is intended to reduce the need for board-level memory components and their associated routing, while supplying data to the processor and AI engine. Those trade-offs will matter most in products where battery life, board area and the ability to run models locally constrain the design.
Coral NPU and open-source tools
Synaptics says its Torq AI engine integrates Google Research’s Coral NPU and supports neural-network workloads including convolutional and transformer models. The company describes the MLIR/IREE compiler as open source and says it supports standard frameworks and model formats. The SR200 also supports Zephyr RTOS, according to the announcement.
“With the Astra SR200 Series, we’re introducing a new class, the xMCU, that brings applications-processor capability into the MCU domain, running multimodal AI workloads that traditionally require Linux and discrete DRAM,” said Vikram Gupta, SVP and GM of Synaptics’ Edge Compute & Connectivity Division.
Synaptics announced the processors on October 20 but did not state prices or a shipping schedule in its release. The concrete test for the xMCU proposition will be whether device makers can run their intended models within their power and memory budgets using the shared platform and toolchain.