The Pulse
Rapidus Forms 17-Company Design Group for 2nm Chips
Rapidus has named 17 design companies as the first members of Rapidus CORE, a network intended to support customers developing chips for its planned 2nm foundry. The company says it expects to expand the network to include electronic design
AI.info Team · Written with AI ·
Rapidus announced Rapidus CORE on October 5, naming 17 companies to its first group of design partners as it builds support for customers developing chips for its planned 2nm foundry. The Japanese company calls the group Design Solution Associates and says the members will connect customers with design resources and engineering expertise.
Seventeen firms join Rapidus CORE
The members are AION Silicon, Cadence Design Systems, Dai Nippon Printing, GreatAsic Technology, HCL Technologies, Infinecs Systems, Infosys, MavissDesign, MosChip Technologies, NSW, Oppstar Technology, Quest Global Services, SkyeChip, Synopsys, TOPPAN, Toshiba Information Systems (Japan) and Wipro. Rapidus listed them alphabetically in its announcement.
The announcement describes CORE as a framework for linking parts of semiconductor development and production, including research institutions, electronic design automation (EDA), intellectual property, design and manufacturing. Its first step is design support: Rapidus says the group will help customers start development earlier and provide a bridge between their teams and the foundry. The initiative is intended to serve customers in Japan and overseas.
Design support comes before a wider network
Rapidus says it plans to add EDA, IP and other categories to CORE after the design group. The October announcement does not spell out individual members’ assignments, service terms or customer access arrangements, and it does not identify particular chip projects. It presents the 17-company group as the first part of a broader support structure, rather than a list of customers or announced chip designs.
That distinction matters for a foundry seeking customers for a new manufacturing process. Chip designers need more than a fabrication line: they also need design tools, compatible IP and technical support to develop and verify designs for a process. Rapidus says the partner group will combine each company’s expertise, but has not detailed how those resources will be coordinated or what services will be available first.
The 2nm process remains on a 2027 production path
Rapidus is developing 2nm logic semiconductors at its IIM-1 facility in Chitose, Hokkaido. In July 2025, the company said it had started prototyping 2nm gate-all-around transistors at IIM-1 and aimed to begin mass production in 2027. Its April 2026 update said the pilot line began operating in April 2025, and that it had verified transistor operation on 300mm wafers and provided an early-adopter process design kit to customers.
In that April update, Rapidus CEO Atsuyoshi Koike described the company’s progress:
“In fiscal year 2025, Rapidus made steady progress on its projects, including the successful verification of Japan’s first 2nm GAA transistor and the industry’s first prototype of an organic insulating film RDL interposer using a 600mm square panel.”
Koike is Rapidus’ representative director and CEO. The April update also said the company would continue developing mass-production technology for 2nm logic chips and planned to target the start of mass production in 2027. Its back-end project includes work on chiplet and package design and manufacturing technology.
The October announcement ties CORE to the development and mass production of advanced semiconductors, but it does not say the new partners are working on AI chips specifically. The group could support a range of customer designs; Rapidus has not named any projects connected to the announcement. The concrete addition so far is a roster of 17 design firms, with EDA and IP partners still to come.