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Powerlattice Reports $86 Million Sold in AI Chip Power Offering
Powerlattice Technologies’ SEC filing reports $86,009,965 sold in an equity offering seeking $111,010,000, with 18 investors listed. The Vancouver, Washington, startup is developing power-delivery chiplets for AI processors and recently dem
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Filing reports $86 million sold
Powerlattice Technologies reported selling $86,009,965 in an equity offering seeking $111,010,000, according to a Form D filed with the U.S. Securities and Exchange Commission on October 30, 2026. The filing reports that $25,000,035 remained to be sold and lists 18 investors. It does not name the investors or identify the financing round. The company reported that the first sale occurred on October 15.
The notice identifies the offering as an equity sale under Rule 506(b), a federal securities exemption, and indicates the company does not intend the offering to last more than one year. The form reports the amounts sold and sought; it does not describe the terms of the equity or the use of proceeds. The SEC filing itself cautions that the commission has not necessarily reviewed the information or determined whether it is accurate and complete.
GeekWire reported the filing and said the company declined to comment. The amount sold is nearly three times the $31 million Powerlattice had raised when it emerged from stealth in November 2025, according to GeekWire. That earlier funding included a $25 million Series A led by Playground Global and Celesta Capital.
Powerlattice is based in Vancouver, Washington, and develops chips intended to reduce the power demands of AI processors. Its 2025 funding announcement named former Intel CEO Pat Gelsinger, a general partner at Playground Global, and Celesta Capital’s Steve Fu as board members.
A regulator inside the processor package
Powerlattice is developing a power-delivery chiplet that places voltage regulation inside a processor package. Conventional designs route electrical current along longer paths before it reaches the processor. The company says shortening that route can reduce energy use by more than half and improve performance. In 2025, Powerlattice said it was providing engineering samples for graphics processors, central processing units and custom accelerators.
The company was founded in 2023 by Peng Zou, Gang Ren and Sujith Dermal, whose backgrounds span Qualcomm, Intel and NUVIA, GeekWire reported. Gelsinger and Fu are among the company’s board members. The Form D also lists Wen Hsieh as a director, alongside Zou, Ren, Dermal, Fu and Gelsinger.
Demonstration used a load emulator
On October 26, Powerlattice announced a demonstration of what it calls a monolithic integrated voltage regulator chiplet. The design combines a controller, power transistors and inductors on one piece of silicon. The company says multiple chiplets can be synchronized to match the power demands of different processors.
For the test, the chiplet supplied power to a high-precision silicon device that Powerlattice developed to emulate the changing loads and current demands of next-generation AI accelerators. The company said the demonstration showed how the chiplet responded to those changes. Its announcement did not report a numerical efficiency or performance result from the test. The company’s claim that its technology reduces total compute power needs by more than 50% is a separate statement about the technology.
“Breaking through the AI power wall requires us to rethink how power reaches the processor,”
Peng Zou, co-founder and CEO of Powerlattice, in the company’s announcement.
The filing records the amount sold, the offering target and the number of investors. The demonstration announcement describes a test on a company-developed emulator; it does not describe a customer’s accelerator as the test device.