Skip to content
AI.info

The Pulse

Google Adds TPU 8tx and TPU 8i Max to Its Eighth-Generation Line

Google's two new TPU systems reuse existing silicon: TPU 8tx pairs TPU 8t chips with AMD EPYC hosts for confidential inference, while TPU 8i Max puts two TPU 8i chips on one package for long-context agent work.

Google Adds TPU 8tx and TPU 8i Max to Its Eighth-Generation Line

AI.info Team · Written with AI · fact-checked ·

Google has added two systems to its eighth generation of Tensor Processing Units: TPU 8tx, aimed at confidential inference for regulated customers, and TPU 8i Max, which places two TPU 8i chips in one package for very long context windows. The announcement came in a post on Google's blog by Amin Vahdat, SVP and Chief Technologist for AI and Infrastructure, and AMD published a release on the same day confirming that its 5th Gen EPYC processors serve as the host CPUs inside TPU 8tx.

The two additions follow TPU 8t and TPU 8i, which Google introduced at Google Cloud Next in April. Google says this is the first year in which it has introduced four TPU systems.

Two New Systems Built From Existing Chips

Vahdat's post draws a line between a new chip and a new system. A chip, in Google's telling, takes years of design and manufacturing; a system is the packaging, memory, networking and security assembled around that chip, and can be changed in months. Neither of the new products uses new silicon. TPU 8tx is built on the same silicon as TPU 8t, and TPU 8i Max combines two TPU 8i chips.

Google presents the four products as a set covering what it calls the agentic lifecycle. In its split, TPU 8t handles scale-up training and TPU 8i low-latency reasoning, while TPU 8tx covers confidential computing and TPU 8i Max covers very large context windows, with Google adding that 8i Max offers the highest compute density per rack.

TPU 8tx: Encryption While Data Is in Use

Data is usually encrypted at rest and in transit, then decrypted in memory for processing. Google says TPU 8tx moves the protection into the hardware so that sensitive data and model weights stay protected and isolated while the chip works on them. Its intended buyers are governments and regulated companies that run frontier or proprietary models and agents on their most sensitive data, and Google describes it as optimized for secure and confidential inference and also suitable for small-scale training.

TPU 8tx borrows Boardfly, the low-latency network Google built for TPU 8i. Google claims latency up to two times lower than on TPU 8t, at what it calls a near-zero cost in performance. The company also says customers can fine-tune models on private data, distill large models into smaller ones and run reinforcement learning on the same system, without moving sensitive data between clusters.

AMD's release supplies the host side. Its 5th Gen EPYC CPUs handle workload orchestration, data preparation and communication with the TPUs, and AMD Secure Encrypted Virtualization (SEV), working together with the TPU, carries confidential computing protection past the CPU to the connected accelerators. AMD calls TPU 8tx the first cloud TPU system to deliver hardware-enforced confidential computing. Its footnote adds that Infinity Guard security features vary by EPYC generation and must be enabled by server makers or cloud providers to operate.

By pairing 5th Gen AMD EPYC processors with our 8th-generation TPU architecture inside the AI Hypercomputer, we are bringing hardware-enforced confidential computing to cloud TPUs for the first time.

Mark Lohmeyer, vice president and general manager for AI and Computing Infrastructure, Google Cloud

The release notes that AMD SEV already underpins Google Cloud's Confidential VMs, Confidential GKE, Confidential Space, Confidential Managed Service for Apache Spark and Confidential Dataflow, and that EPYC chips sit in the C4D, N4D, H4D, Z4D and G4 virtual machines on Compute Engine.

TPU 8i Max: Two Chips on One Package

TPU 8i Max targets what Google calls the memory wall, the point at which memory bandwidth limits work such as dozens of agents operating across a whole codebase or hours of video. By combining two TPU 8i chips on a single package, Google says the system has twice the compute of a single TPU 8i, twice its SRAM and twice its HBM bandwidth. Google also says it fits twice the silicon into the existing rack footprint.

For scale, Google's April post put a single TPU 8i at 288 GB of high-bandwidth memory and 384 MB of on-chip SRAM, three times the SRAM of the previous generation. The doubling Google gives for TPU 8i Max applies to compute, SRAM and HBM bandwidth.

Where the April Chips Stand

The new post credits TPU 8t with up to 2.7 times better training performance than the previous generation and TPU 8i with 80% better inference price performance. In April, Google described TPU 8t as delivering nearly 3x the compute performance per pod, with up to 9,600 chips in one superpod sharing two petabytes of high-bandwidth memory, and said both chips offered up to two times better performance per watt than Ironwood, the seventh generation. That April post said both chips would be generally available later in 2026.

Google also puts the TPU customer count at nearly 100, ranging from frontier labs and trading firms to retailers and universities, and that some customers now deploy TPUs in their own data centers.

Software Aimed at PyTorch Users

The hardware came with a list of software updates. Google points to TorchTPU, which it open-sourced in October so that PyTorch code and Hugging Face models run natively on TPUs, and to a new open-source TPU agent suite, in preview, that works inside coding tools including Claude Code, Cursor and Google Antigravity. It also announced an open-source XLA Serving Engine, an Agent Compute Engine that suspends and resumes idle agent sessions, and TPU Sync, an open-source model-state layer that Google says cuts KV transfer latency and time to first token by more than 90%.

Cloud Pathways and GKE dynamic slicing are now generally available on Google Kubernetes Engine, according to the post, with Google claiming dynamic slicing cuts job startup times by up to 5x. Google also says its vLLM-TorchTPU stack reached state-of-the-art price-performance on the InferenceX and AgentX benchmarks, without giving the figures in the post.

What Comes Next

Google scheduled a broadcast on the new systems for 9 a.m. PT on the day of the announcement, and its Cloud TPU product page now lists TPU 8tx and TPU 8i Max next to TPU 8t, TPU 8i and the seventh-generation Ironwood.

Sources

Related stories

Explore

More articles