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CXMT Begins Mass Production of 11.95nm DRAM Platform

China’s CXMT has started mass production of its fifth-generation G5 DRAM platform, built with an 11.95nm active-area half-pitch. The company also introduced 24Gb LPDDR5X products that it says deliver 50% more capacity than the previous gene

CXMT Begins Mass Production of 11.95nm DRAM Platform

AI.info Team ·

ChangXin Memory Technologies has started mass production of a fifth-generation DRAM platform that it says narrows the manufacturing gap with Samsung Electronics and SK Hynix, although the company has not disclosed the yields or monthly output that will determine its commercial impact.

CXMT announced the move on September 20, 2026, at the World Manufacturing Convention in Hefei, Anhui province. Its G5 platform uses quadruple-exposure technology to reduce the active-area half-pitch in its memory array to 11.95 nanometers, according to the South China Morning Post and a report published by Xinhua.

CXMT puts G5 into volume production

The announcement marks CXMT’s move from process development into mass production for G5. The company says the platform produces at least 50% more dies per wafer than its fourth-generation process when measured against an 8Gb-equivalent standard, improving the potential cost and energy profile of its memory products.

That figure describes gross die output rather than the number of working chips shipped after testing. CXMT has not released a specific yield rate, wafer-start figure or monthly production target, leaving open how quickly the new platform can add usable supply to the market.

What 11.95nm means in DRAM

CXMT’s 11.95nm figure refers to the active-area half-pitch of its memory array. It is not the same as a complete logic-chip process node, and direct comparisons with the process labels used by Samsung, SK hynix and Micron require care.

CXMT says the result comes from quadruple exposure, a patterning method that repeats exposure and etching steps to form smaller structures. The company also reports a 45:1 storage-capacitor aspect ratio and says it has applied a high-k metal-gate process to shrink the platform’s core functional area.

South Korea’s Samsung and SK hynix are described in the company’s announcement as using 10-nanometer-class DRAM processes. CXMT characterizes G5 as close to the most advanced memory platforms currently in mass production, but the available announcement does not provide the full performance, yield or power data needed for a direct product-to-product comparison.

Two 24Gb LPDDR5X chips enter production

CXMT displayed two LPDDR5X products made on the G5 platform. Each chip has a capacity of 24 gigabits, a 50% increase over the previous generation of comparable products, and the two versions use 496-ball and 245-ball package formats for different mobile and portable-device designs.

The products are aimed at smartphones and other portable electronics. Xinhua reported that both have entered scaled production, while the South China Morning Post described them as mass-produced products shown at the Hefei event.

Higher-capacity mobile DRAM gives device makers another way to add memory without increasing the number of chips in a package. The practical value of the G5 launch will depend on whether CXMT can sustain yields and secure design wins beyond the products displayed at the event.

China’s memory push meets a concentrated market

CXMT is expanding while the three established DRAM suppliers focus heavily on higher-value products such as high-bandwidth memory and server DRAM. That creates room for a Chinese supplier to grow in commodity and mobile memory, but it also places pressure on CXMT to prove that its process can deliver reliable volume rather than only a headline manufacturing metric.

The company has already moved beyond its earlier DDR4 focus. Its product work now includes DDR5, LPDDR5X and LPDDR6, with the latest G5 announcement targeting a higher-capacity LPDDR5X segment used in premium mobile devices.

The next test is output, not the announcement

G5 gives CXMT a more advanced process platform and a stated 50% improvement in wafer-level die output. The unresolved questions are production yield, monthly capacity, customer qualification and how the chips perform against competing products in power consumption, speed and reliability.

Until CXMT publishes those figures, the September 20 announcement establishes a mass-production milestone but not a new ranking among the world’s DRAM suppliers. The company has confirmed the platform, the 11.95nm active-area half-pitch and the two 24Gb LPDDR5X products; shipment scale remains undisclosed.

Source

South China Morning Post

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