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Technical Lead Manager, Machine Learning, Memory Subsystem Design

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise wil

Company

Google

Location

Sunnyvale, CA, USA

Status

Closed

Posted

2026-08-21T20:38:28+00:00

Google is hiring a technical lead manager to run a team of RTL design and verification engineers building DRAM and HBM memory subsystems for its TPU machine-learning products. The job covers planning and executing with cross-functional teams, choosing memory IP from third-party providers, working with DRAM manufacturers, and improving design methods. It asks for a bachelor's degree in electrical engineering, computer engineering or computer science, 15 years in semiconductor design or verification, six years managing people, and DRAM subsystem experience; HBM work and a master's or PhD are preferred.