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Sr. Engineer, CPU RTL Design

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software

Company

Tenstorrent

Location

Austin, Texas, United States; Santa Clara, California, United States

Status

Open

Posted

2026-05-22T17:39:42+00:00

Tenstorrent is hiring a senior engineer for its CPU design team in Austin or Santa Clara, on a hybrid schedule. The person owns RTL design and microarchitecture for part of a block of a high-performance RISC-V CPU, working with DV, PD and performance engineers toward functional, timing and power convergence, running RTL experiments, and improving design flows and tools. The posting asks for CPU microarchitecture depth in rename, scheduler, ROB, load-store, branch prediction, cache or datapath; RTL coding in Verilog or VHDL; simulation, synthesis and power analysis tools; and pre- and post-silicon debug. Pay spans $100k–$500k across all engineers.