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Physical Design Engineer: Die-to-Die Interface (RTL to GDSII)

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software

Company

Tenstorrent

Location

Santa Clara, California, United States

Status

Open

Posted

2026-02-27T00:40:03+00:00

Tenstorrent is hiring a physical design engineer to lead implementation and closure of high-speed die-to-die interfaces for multi-die and chiplet architectures. The work covers RTL-to-GDSII: synthesis, floorplanning, place-and-route, CTS, timing and signal-integrity analysis, and DRC/LVS sign-off. The posting asks for 5+ years at 7nm or below, multiple tapeouts, familiarity with D2D, PCIe, HBM, or SerDes, and EDA tool experience. It also involves Tcl/Python flow automation and collaboration with full-chip and analog PHY teams. The posting says the role is remote in the U.S., though the listing field says onsite.