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ASIC Package SI/PI Engineer

About the TeamOpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native si

Company

OpenAI

Location

San Francisco

Status

Open

Posted

2026-08-19T16:38:14.028+00:00

OpenAI's hardware group is hiring an engineer to own signal and power integrity for AI ASIC packages, from early feasibility studies through production. The work covers high-speed channels for 200G/400G SerDes, PCIe, HBM and die-to-die links, 2D/3D electromagnetic modeling, stack-up and bump-map definition, power-delivery-network analysis, and simulation automation. Candidates need five or more years in signal or power integrity, hands-on use of tools such as HFSS, SIwave, HSPICE, Sigrity or Clarity, and package layout experience. Preferred: 2.5D/3D packaging and lab validation with VNA, TDR and oscilloscopes.